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CS8363 3.3 V Dual Micropower Low Dropout Regulator with ENABLE and RESET
The CS8363 is a precision micropower dual voltage regulator with ENABLE and RESET. The 3.3 V standby output is accurate within 2% while supplying loads of 100 mA. Quiescent current is low, typically 140 A with a 300 A load. The active RESET output monitors the 3.3 V standby output and is low during power-up and regulator dropout conditions. The RESET circuit includes hysteresis and is guaranteed to operate correctly with 1.0 V on the standby output. The second output tracks the 3.3 V standby output through an external adjust lead, and can supply loads of 250 mA with a typical dropout voltage of 400 mV. The logic level lead ENABLE is used to control this tracking regulator output. Both outputs are protected against overvoltage, short circuit, reverse battery and overtemperature conditions. The robustness and low quiescent current of the CS8363 makes it not only well suited for automotive microprocessor applications, but for any battery powered microprocessor applications.
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1 7 D2PAK 7-PIN DPS SUFFIX CASE 936H
Pin 1. VSTBY 2. VIN 3. VTRK 4. GND 5. Adj 6. ENABLE 7. RESET
MARKING DIAGRAM
* 2 Regulated Outputs - Standby Output 3.3 V 2%; 100 mA - Adjustable Tracking Output; 250 mA * Low Dropout Voltage * RESET for VSTBY * ENABLE for VTRK * Low Quiescent Current * Protection Features - Independent Thermal Shutdown - Short Circuit - 60 V Load Dump - Reverse Battery
Features
CS8363 AWLYWW
A WL, L YY, Y WW, W
1 = Assembly Location = Wafer Lot = Year = Work Week
ORDERING INFORMATION*
Device CS8363YDPS7 Package D2PAK, 7-PIN Shipping 50 Units/Rail
CS8363YDPSR7 D2PAK, 7-PIN 750 Tape & Reel *Contact your local sales representative for SO-16L package option.
(c) Semiconductor Components Industries, LLC, 2001
1
March, 2001 - Rev. 8
Publication Order Number: CS8363/D
CS8363
VIN Overvoltage Shutdown Current Limit
VSTBY 3.3 V, 100 mA, 2.0% Bandgap RESET BG BG
OVSD
+ -
TSD OVSD VIN Current Limit Thermal Shutdown TSD VTRK 250 mA
- +
Adj
ENABLE
- + BG
VSTBY TSD OVSD
RESET + GND RESET -
Figure 1. Block Diagram. Consult Your Local Sales Representative for Positive ENABLE Option
ABSOLUTE MAXIMUM RATINGS*
Rating Supply Voltage, VIN Positive Transient Input Voltage, tr > 1.0 ms Negative Transient Invput Voltage, T < 100 ms, 1.0 % Duty Cycle Input Voltage Range (ENABLE, RESET) Junction Temperature Storage Temperature Range ESD Susceptibility (Human Body Model) Lead Temperature Soldering 1. 10 seconds max. 2. 60 seconds max above 183C *The maximum package power dissipation must be observed. Wave Solder (through hole styles only) Note 1. Reflow (SMD styles only) Note 2. Value -16 to 26 60 -50 -0.3 to 10 -40 to +150 -55 to +150 2.0 260 peak 230 peak Unit V V V V C C kV C C
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CS8363
ELECTRICAL CHARACTERISTICS (6.0 V VIN 26 V, IOUT1 = IOUT2 = 100 A, -40C TA +125C;
unless otherwise stated.) Characteristic Tracking Output (VTRK) VTRK Tracking Error (VSTBY - VTRK) Adjust Pin Current, IAdj Line Regulation Load Regulation Dropout Voltage (VIN - VTRK) Current Limit Quiescent Current Reverse Current Ripple Rejection Standby Output (VSTBY) Output Voltage, VSTBY Line Regulation Load Regulation Dropout Voltage (VIN - VSTBY) Current Limit Short Circuit Current Quiescent Current Reverse Current Ripple Rejection RESET ENABLE Functions ENABLE Input Threshold ENABLE Input Bias Current RESET Hysteresis RESET Threshold Low (VRL) RESET Leakage Output Voltage, Low (VRLO) Output Voltage, Low (VRPEAK) VIN (VRST Low) Protection Circuitry (Both Outputs) Independent Thermal Shutdown Overvoltage Shutdown VSTBY VTRK - 150 150 30 180 165 34 - - 38 C C V - VENABLE = 0 V to 10 V - VSTBY Decreasing, VIN > 4.5 V - 1.0 V VSTBY VRL, RRST = 10 k VSTBY, Power Up, Power Down VSTBY = 3.3 V 0.8 -10 10 92.5 - - - - 1.2 0 50 95 - 0.1 0.6 4.0 2.0 10 100 97.5 25 0.4 1.0 4.5 V A mV %VSTBY A V V V 4.5 V VIN 26 V, 100 A ISTBY 100 mA. 6.0 V VIN 26 V. 100 A ISTBY 100 mA. ISTBY = 100 A, VIN = 4.2 V ISTBY = 100 mA, VIN = 4.2 V VIN = 12 V, VSTBY = 3.0 V VIN = 12 V, VSTBY = 0 V VIN = 12 V, ISTBY = 100 mA, ITRK = 0 mA VIN = 12 V, ISTBY = 300 A, ITRK = 0 mA VSTBY = 3.3 V, VIN = 0 V f = 120 Hz, ISTBY = 100 mA, 7.0 V VIN 17 V 3.234 - - - - 125 10 - - - 60 3.3 5.0 5.0 - - 200 100 10 140 100 70 3.366 50 50 1.0 1.0 - - 20 200 200 - V mV mV V V mA mA mA A A dB 6.0 V VIN 26 V, 100 A ITRK 250 mA. Note 3. Loop in Regulation 6.0 V VIN 26 V. Note 3. 100 A ITRK 250 mA. Note 3. ITRK = 100 A. ITRK = 250 mA VIN = 12 V, VTRK = 3.0 V VIN = 12 V, ITRK = 250 mA, No Load on VSTBY VIN = 12 V, ITRK = 500 A, ISTBY = 100 A VTRK = 3.3 V, VIN = 0 V f = 120 Hz, ITRK = 250 mA, 7.0 V VIN 17 V -25 - - - - - 275 - - - 60 - 1.5 5.0 5.0 100 400 500 25 145 200 70 +25 5.0 50 50 150 700 - 50 220 1500 - mV A mV mV mV mV mA mA A A dB Test Conditions Min Typ Max Unit
3. VTRK connected to Adj lead. VTRK can be set to higher values by using an external resistor divider.
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CS8363
PACKAGE PIN DESCRIPTION
PACKAGE PIN # D2PAK 1 2 3 4 5 6 7 PIN SYMBOL VSTBY VIN VTRK GND Adj ENABLE RESET FUNCTION Standby output voltage delivering 100 mA. Input voltage. Tracking output voltage controlled by ENABLE delivering 250 mA. Reference ground connection. Resistor divider from VTRK to Adj. Sets the output voltage on VTRK. If tied to VTRK, VTRK will track VSTBY. Provides on/off control of the tracking output, active LOW. CMOS compatible output lead that goes low whenever VSTBY falls out of regulation.
CIRCUIT DESCRIPTION
ENABLE Function VTRK Output Voltage
The ENABLE function switches the output transistor for VTRK on and off. When the ENABLE lead voltage exceeds 1.4 V (typ), VTRK turns off. This input has several hundred millivolts of hysteresis to prevent spurious output activity during power-up or power-down.
RESET Function
The RESET is an open collector NPN transistor, controlled by a low voltage detection circuit sensing the VSTBY (3.3 V) output voltage. This circuit guarantees the RESET output stays below 1.0 V (0.1 V typ) when VSTBY is as low as 1.0 V to ensure reliable operation of microprocessor-based systems.
This output uses the same type of output device as VSTBY, but is rated for 250 mA. The output is configured as a tracking regulator of the standby output. By using the standby output as a voltage reference, giving the user an external programming lead (Adj lead), output voltages from 3.3 V to 20 V are easily realized. The programming is done with a simple resistor divider, and following the formula:
VTRK + VSTBY (1 ) R1 R2) ) IAdj R1
If another 3.3 V output is needed, simply connect the Adj lead to the VTRK output lead.
3.3 V, 100 mA B+ C1* 0.1 F VIN CS8363 RESET ENABLE R2 Adj R1 GND VTRK SW 5.0 V, 250 mA C3** 10 F ESR < 8.0 GND VSTBY R3 C2** 10 F ESR < 8.0 VDD MCU RESET I/O
VTRK VSTBY(1 + R1/R2) For VTRK 5.0 V, R1/R2 0.5 *C1 is required if regulator is located far from power supply filter. **C2 and C3 are required for stability.
Figure 2. Test and Application Circuit, 3.3 V, 5.0 V Regulator
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CS8363
3.3 V, 100 mA B+ C1* 0.1 F VIN CS8363 RESET ENABLE Adj SW 3.3 V, 250 mA C3** 10 F ESR < 8.0 VSTBY R3 C2** 10 F ESR < 8.0 VDD MCU RESET I/O
GND
VTRK
GND
*C1 is required if regulator is located far from power supply filter. **C2 and C3 are required for stability.
Figure 3. Test and Application Circuit, Dual 3.3 V Regulator
APPLICATION NOTES
External Capacitors
Output capacitors for the CS8363 are required for stability. Without them, the regulator outputs will oscillate. Actual size and type may vary depending upon the application load and temperature range. Capacitor effective series resistance (ESR) is also a factor in the IC stability. Worst-case is determined at the minimum ambient temperature and maximum load expected. Output capacitors can be increased in size to any desired value above the minimum. One possible purpose of this would be to maintain the output voltages during brief conditions of negative input transients that might be characteristic of a particular system. Capacitors must also be rated at all ambient temperatures expected in the system. To maintain regulator stability down to -40C, capacitors rated at that temperature must be used. More information on capacitor selection for SMART REGULATOR(R)s is available in the SMART REGULATOR application note, "Compensation for Linear Regulators," document number SR003AN/D, available through the Literature Distribution Center or via our website at http://www.onsemi.com.
Calculating Power Dissipation in a Dual Output Linear Regulator
IOUT2(max) is the maximum output current, for the application, and IQ is the quiescent current the regulator consumes at both IOUT1(max) and IOUT2(max). Once the value of PD(max) is known, the maximum permissible value of RJA can be calculated:
RQJA + 150C * TA PD
(2)
The value of RJA can be compared with those in the package section of the data sheet. Those packages with RJA's less than the calculated value in equation 2 will keep the die temperature below 150C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required.
IIN VIN IOUT1 VOUT1
SMART REGULATOR
Control Features
IOUT2 VOUT2
The maximum power dissipation for a dual output regulator (Figure 4) is
PD(max) + VIN(max) * VOUT1(min) IOUT1(max) ) VIN(max) * VOUT2(min) IOUT2(max) ) VIN(max)IQ (1)
IQ
where: VIN(max) is the maximum input voltage, VOUT1(min) is the minimum output voltage from VOUT1, VOUT2(min) is the minimum output voltage from VOUT2, IOUT1(max) is the maximum output current, for the application,
Figure 4. Dual Output Regulator With Key Performance Parameters Labeled. Heat Sinks
A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air.
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CS8363
Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RJA: where: RJC = the junction-to-case thermal resistance,
RQJA + RQJC ) RQCS ) RQSA
(3)
RCS = the case-to-heatsink thermal resistance, and RSA = the heatsink-to-ambient thermal resistance. RJC appears in the package section of the data sheet. Like RJA, it too is a function of package type. RCS and RSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers.
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CS8363
PACKAGE DIMENSIONS
D2PAK 7-PIN DPS SUFFIX CASE 936H-01 ISSUE O
-T- SEATING PLANE B 8 V A 1 2 34 5 6 7 K F G D
7 PL M DIM A B C D E F G H J K M N U V
M
C E
U
NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS B AND M. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAX. INCHES MIN MAX 0.326 0.336 0.396 0.406 0.170 0.180 0.026 0.036 0.045 0.055 0.058 0.078 0.050 BSC 0.100 0.110 0.018 0.025 0.204 0.214 0.055 0.066 0.000 0.004 0.256 REF 0.305 REF MILLIMETERS MIN MAX 8.28 8.53 10.05 10.31 4.31 4.57 0.66 0.91 1.14 1.40 1.41 1.98 1.27 BSC 2.54 2.79 0.46 0.64 5.18 5.44 1.40 1.68 0.00 0.10 6.50 REF 7.75 REF
H J
0.13 (0.005)
TB
M
N
PACKAGE THERMAL DATA Parameter RJC RJA Typical Typical D2PAK, 7-Pin 3.5 10-50* Unit C/W C/W
*Depending on thermal properties of substrate. RJA = RJC + RCA.
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CS8363
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLIC).
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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CS8363/D

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